The present invention relates to a photomask used in lithography of semiconductor processing, and a resist pattern formation method, a method of determining alignment accuracy and a method of fabricating a semiconductor device using the photomask.
In the photolithography of semiconductor processing, in order to prevent alignment shift between a lower pattern formed on a lower layer and an upper pattern formed on an upper layer, it is determined whether or not there is alignment shift between a first alignment accuracy determining mark formed on the lower pattern and a second alignment accuracy determining mark formed on a resist pattern used for forming the upper pattern. When the alignment shift of the second alignment accuracy determining mark from the first alignment accuracy determining mark is within an allowable range, the upper layer is etched by using the resist pattern to form the upper pattern. When the alignment shift of the second alignment accuracy determining mark from the first alignment accuracy determining mark is out of the allowable range, the resist pattern is generally formed once again.
Before describing a first conventional method in which a lower portion of a contact hole is formed in a lower interlayer insulating film and an upper portion of the contact hole communicated with the lower portion is formed in an upper interlayer insulating film, the necessity for forming the lower portion of the contact hole in the lower interlayer insulating film and the upper portion thereof in the upper interlayer insulating film will be described as the premise.
In accordance with development in the integration of semiconductor integrated circuits, it is desired to form, in an interlayer insulating film, an opening for a contact hole or a line pattern having a small opening size and a large depth, namely, a high aspect ratio. Therefore, techniques for forming an opening with a high aspect ratio, such as an etching gas and a plasma etching system that can etch the bottom of an opening with a high aspect ratio, have been developed.
A contact hole with a very high aspect ratio, however, cannot be dealt with by the currently developed dry etching technique. Specifically, when the aspect ratio is so high that ions included in plasma cannot reach the bottom of the contact hole, the bottom of the contact hole cannot be etched even by conducting dry etching over infinitive etching time. In other words, there is a limit aspect ratio at which the etching cannot be carried out even through the dry etching conducted over infinitive etching time. For example, in the currently employed dry etching technique, the limit aspect ratio is approximately 6. Specifically, when a contact hole has an opening size of 0.2 xcexcm, the limit of the depth of the hole that can be dry etched is approximately 1.8 xcexcm. Therefore, a contact hole having an opening size of 0.2 xcexcm cannot be formed into a depth larger than 1.8 xcexcm by the current etching technique.
On the other hand, in order to meet the demands for further refinement of semiconductor integrated circuits, it is desired to form a contact hole with a depth beyond the limit aspect ratio in an interlayer insulating film.
Therefore, the aforementioned method is required, in which an interlayer insulating film is dividedly deposited as a lower inter layer insulating film and an upper interlayer insulating film, and contact holes each having a depth below the limit aspect ratio are formed in the same position in the lower interlayer insulating film and the upper interlayer insulating film, so as to form one contact hole from the lower contact hole formed in the lower interlayer insulating film and the upper contact hole formed in the upper interlayer insulating film. In this case, the thicknesses of the lower and upper interlayer insulating films are set so that the aspect ratios of the contact holes respectively formed therein can be lower than the limit aspect ratio.
Now, the first conventional method will be described with reference to FIGS. 11(a) through 11(c) and 12(a) through 12(c). In each of FIGS. 11(a), 11(c) and 12(a) through 12(c), a portion on the right hand side of break lines corresponds to a main pattern region (element formation region) where line patterns and contact holes are to be formed, and a portion on the left hand side of the break lines corresponds to an alignment accuracy determining mark region where alignment accuracy determining marks are to be formed.
First, as is shown in FIG. 11(a), a line pattern 12 of a metal line or a gate electrode is formed on an underlying insulating film 11 formed on a semiconductor substrate 10. In this case, a first alignment accuracy determining mark 13 in a concave shape is formed in the line pattern 12. Next, after depositing a lower interlayer insulating film 14 on the line pattern 12, a first resist film is formed on the lower interlayer insulating film 14, and the first resist film is exposed by using a photomask 15 and developed, thereby forming a first resist pattern 16. In the first resist pattern 16, a second alignment accuracy determining mark 17 in a convex shape having a smaller plane area than the first alignment accuracy determining mark 13 is formed in a position corresponding to the first alignment accuracy determining mark 13.
Then, as is shown in FIG. 11(b), it is determined whether or not there is alignment shift of the second alignment accuracy determining mark 17 from the first alignment accuracy determining mark 13. In the determination of the alignment shift, the shapes of the line pattern 12 and the first resist pattern 16 can be recognized by observing the top face of the semiconductor substrate 10 with an optical measurement apparatus because the lower interlayer insulating film 14 is transparent in a visible radiation region. Accordingly, the distance in the X direction and the Y direction between the edges of the first alignment accuracy determining mark 13 and the second alignment accuracy determining mark 17 (i.e., the alignment shift) can be thus measured, so as to determine whether or not the alignment shift of the second alignment accuracy determining mark 17 from the first alignment accuracy determining mark 13 is within an allowable range.
When it is determined that the alignment shift of the second alignment accuracy determining mark 17 from the first alignment accuracy determining mark 13 is within the allowable range, the lower interlayer insulating film 14 is etched by using the first resist pattern 16 as a mask, so as to form a contact lower portion 19 by forming a lower portion 18 of a contact hole in the lower interlayer insulating film 14 and filling a first metal film within the lower portion 18 of the contact hole as is shown in FIG. 11(c). In this case, in the alignment accuracy determining mark region, an opening is formed in a peripheral portion of the second alignment accuracy determining mark 17 in the lower interlayer insulating film 14, namely, in a peripheral portion of the first alignment accuracy determining mark 13, and hence, the first metal film 20 is filled within this opening.
Next, as is shown in FIG. 12(a), after depositing an upper interlayer insulating film 21 on the lower interlayer insulating film 14, a second resist film is formed on the upper interlayer insulating film 21. Then, the second resist film is exposed by using the same photomask 15 and developed, thereby forming a second resist pattern 22. Also in this case, in the second resist pattern 22, a third alignment accuracy determining mark 23 in a convex shape with the same size as the second alignment accuracy determining mark 17 is formed.
Since the first metal film 20 is filled in the peripheral portion of the first alignment accuracy determining mark 13 as described above, however, the edge of the first alignment accuracy determining mark 13 cannot be recognized by observing the top face of the semiconductor substrate 10 with an optical measurement apparatus. Therefore, the alignment shift of the third alignment accuracy determining mark 23 from the first alignment accuracy determining mark 13 cannot be thus measured.
Therefore, inevitably, without determining whether or not the alignment shift of the third alignment accuracy determining mark 23 from the first alignment accuracy determining mark 13 is within the allowable range, the upper interlayer insulating film 21 is etched by using the second resist pattern 22 as a mask, so as to form a contact. upper. portion 25 by forming an upper portion 24 of the contact hole in the upper interlayer insulating film 21 and filling a second metal film within the upper portion 24 of the contact hole. In this case, the second metal film 26 is also filled in a peripheral portion of the third alignment accuracy determining mark 23 in the upper interlayer insulating film 21.
Now, a second conventional method in which a contact hole is formed in a lower interlayer insulating film deposited on a lower line pattern and a line groove communicating with the contact hole is formed in an upper interlayer insulating film will be described with reference to FIGS. 13(a) through 13(d). In each of FIGS. 13(a) through 13(d), a portion on the right hand side of break lines corresponds to a main pattern region (element formation region) where line patterns and contact holes are to be formed, and a portion on the left hand side of the break lines corresponds to an alignment accuracy determining mark region where alignment accuracy determining marks are to be formed.
First, as is shown in FIG. 13(a), a line pattern 32 of a metal line or a gate electrode is formed on an underlying insulating film 31 formed on a semiconductor substrate 30. In this case, in the line pattern 32, a first alignment accuracy determining mark 33 in a concave shape is formed. Next, after depositing a lower interlayer insulating film 34 on the line pattern 32, a first resist film is formed on the lower interlayer insulating film 34, and the first resist film is exposed by using a first photomask 35 and developed, thereby forming a first resist pattern 36. In the first resist pattern 36, a second alignment accuracy determining mark 37 in a convex shape having a smaller plane area than the first alignment accuracy determining mark 33 is formed in a position corresponding to the first alignment accuracy determining mark 33, and an island portion 38 having substantially the same plane shape as the first alignment accuracy determining mark 33 is formed in a position different from the second alignment accuracy determining mark 37.
Next, it is determined whether or not the alignment shift of the second alignment accuracy determining mark 37 from the first alignment accuracy determining mark 33 is within an allowable range in the same manner as in the first conventional method. When it is determined that the alignment shift of the second alignment accuracy determining mark 37 from the first alignment accuracy determining mark 33 is within the allowable range, the lower interlayer insulating film 34 is etched by using the first resist pattern 36 as a mask, so as to form a contact 40 by forming a contact hole 39 in the lower interlayer insulating film 34 and filling a first metal film within the contact hole 39 as is shown in FIG. 13(b).
In this case, since an opening is formed in a peripheral portion of the first alignment accuracy determining mark 33 in the alignment accuracy determining mark region, the first metal film 41 is filled within the opening. Owing to the island portion 38 formed in the first resist pattern 36, however, a third alignment accuracy determining mark 42 in a concave shape is formed in the first metal film 41.
Next, as is shown in FIG. 13(c), after depositing an upper interlayer insulating film 43 on the lower interlayer insulating film 34, a second resist film is formed on the upper interlayer insulating film 43, and the second resist film is exposed by using a second photomask 44 and developed, thereby forming a second resist pattern 45. A fourth alignment accuracy determining mark 46 in a convex shape having a smaller plane area than the third alignment accuracy determining mark 42 is formed in the second resist pattern 45 in a position corresponding to the third alignment accuracy determining mark 42.
Then, it is determined whether or not the alignment shift of the fourth alignment accuracy determining mark 46 from the third alignment accuracy determining mark 42 is within an allowable range in the same manner as in the first conventional method. When it is determined that the alignment shift of the fourth alignment accuracy determining mark 46 from the third alignment accuracy determining mark 42 is within the allowable range, the upper interlayer insulating film 43 is etched by using the second resist pattern 45 as a mask, so as to form a buried line 48 by forming a line groove 47 in the upper interlayer insulating film 43 and filling a second metal film within the line groove 47 as is shown in FIG. 13(d).
The first and second conventional methods have, however, the following problems: In the first conventional method, since the upper interlayer insulating film 21 is etched by using the second resist pattern 22 without the determination of the alignment shift of the third alignment accuracy determining mark 23 from the first alignment accuracy determining mark 13. Accordingly, as is shown in FIG. 12(c), the upper portion 24 of the contact hole formed in the upper interlayer insulating film 21 can be shifted in the position from the lower portion 18 of the contact hole formed in the lower interlayer insulating film 14, resulting in causing alignment shift of the contact upper portion 25 from the contact lower portion 19. Due to this alignment shift, problems such as a large resistance value and disconnection can occur in the contact formed from the contact lower portion 19 and the contact upper portion 25.
In the second conventional method, although the alignment shift is not caused between the buried line 48 and the contact 40, it is necessary to form the second alignment accuracy determining mark 37 in the position corresponding to the first alignment accuracy determining mark 33 and to form the fourth alignment accuracy determining mark 46 in the position corresponding to the third alignment accuracy determining mark 42. Accordingly, the alignment accuracy determining mark region occupies a large area, which reduces the area occupied by the main pattern region in the photomask.
As described above, in the case where plural resist patterns are formed through plural pattern exposure by using the same photomask as in the first conventional method, there arises a problem that the alignment shift of the resist pattern formed through the second or later pattern exposure cannot be determined. Furthermore, in the case where plural resist patterns are formed through pattern exposure by using different photomasks as in the second conventional method, there arises a problem that the area of the alignment accuracy determining mark region is large because the positions of alignment accuracy determining marks should be changed in the respective photomasks.
Through examination of the problems of the first and second conventional methods, the following common problem can be found in these conventional methods: An alignment accuracy determining mark formed in a first conductive film pattern made from a first conductive film (corresponding to the line pattern 12 in the first conventional method or the line pattern 32 in the second conventional method) can be used for the determination of alignment shift of a resist pattern for forming a second conductive film pattern from a second conductive film (corresponding to the contact lower portion 19 in the first conventional method or the contact 39 in the second conventional method) but cannot be used for the determination of alignment shift of a resist pattern for forming a third conductive film pattern from a third conductive film (corresponding to the contact upper portion 25 in the first conventional method or the buried line 48 in the second conventional method).
In other words, the first conventional method and the second conventional method have a common problem that an alignment accuracy determining mark formed in a lower conductive film pattern cannot be used plural times.
In consideration of the aforementioned conventional problems, an object of the invention is allowing an alignment accuracy determining mark formed in a lower conductive film pattern to be used plural times, and specifically, allowing an alignment accuracy determining mark formed in a first conductive film pattern made from a first conductive film to be used not only in determination of alignment shift of a resist pattern for forming a second conductive film pattern from a second conductive film but also in determination of alignment shift of a resist pattern for forming a third conductive film pattern from a third conductive film.
In order to achieve the object, according to the invention, an alignment accuracy determining mark not penetrating a resist film in section after development is formed in the resist film, so that an alignment accuracy determining mark formed in a lower conductive film pattern cannot be buried in a conductive film.
Specifically, the photomask of this invention for use in forming a resist pattern from a resist film comprises a main pattern part for forming a main pattern in the resist film; and an alignment mark part for forming, in the resist film, an alignment accuracy determining mark not penetrating the resist film in section after development of the resist film.
When a resist pattern is formed by subjecting a resist film to pattern exposure using the photomask of the invention and development, an alignment accuracy determining mark not penetrating the resist film in section is formed in the resist pattern. Therefore, when an insulating film is etched by using the resist pattern, no opening is formed in the insulating film in a position corresponding to the alignment accuracy determining mark. Accordingly, when an upper conductive film is deposited on the insulating film, the upper conductive film is not filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern, so that the alignment accuracy determining mark formed in the lower conductive film can be optically observed. In other words, the alignment accuracy determining mark formed in the lower conductive film can be optically observed even after depositing the upper conductive film on the insulating film. As a result, the alignment accuracy determining mark formed in the lower conductive film can be used again in determining alignment shift of a resist pattern for patterning an insulating film deposited on the upper conductive film.
In the photomask of the invention, the alignment mark part preferably has a fine opening pattern with an opening width smaller than a resolution limit of exposing light.
In this manner, an alignment accuracy determining mark in a concave shape can be formed in the resist film after development. Therefore, when an insulating film is etched by using a resist pattern formed from the developed resist film, neither an opening is formed nor a conductive film is filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern. Accordingly, the alignment accuracy determining mark formed in the conductive film pattern below the insulating film can be optically observed.
In the photomask of this invention, the main pattern part is preferably made from a halftone type phase shift mask, and the alignment mark part preferably includes a phase shift mask region where plural non-shield portions for transmitting exposing light with no attenuation and causing no phase difference and plural shield portions for transmitting the exposing light with causing attenuation and phase inversion are alternately formed.
In this manner, an alignment accuracy determining mark having a step portion can be formed in the developed resist film on the basis of a difference in energy between light passing through the phase shift mask region and light passing through a peripheral portion of the phase shift mask region. Accordingly, when an insulating film is etched by using a resist pattern formed from the developed resist film, neither an opening is formed nor an upper conductive film is filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern. As a result, the alignment accuracy determining mark formed in the lower conductive film can be optically observed.
In the photomask of this invention, the main pattern part is preferably made from a halftone type phase shift mask, and the alignment mark part preferably includes a shield film formed on the halftone type phase shift mask.
In this manner, an alignment accuracy determining mark having a step portion can be formed in the developed resist film on the basis of a difference in energy between light passing through the shield film formed in the halftone type photomask and light passing through a peripheral portion of the shield film. Accordingly, when an insulating film is etched by using a resist pattern formed from the developed resist film, neither an opening is formed nor an upper conductive film is filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern. As a result, the alignment accuracy determining mark formed in the lower conductive film can be optically observed.
The resist pattern formation method of this invention comprises the steps of forming a resist film on an insulating film formed on a conductive film pattern having a first alignment accuracy determining mark in an alignment mark formation region different from an element formation region; and forming a main pattern in the element formation region of the resist film by irradiating the resist film with exposing light through a photomask and developing the resist film after irradiation, and forming a second alignment accuracy determining mark not penetrating, in section, the resist film in the alignment mark formation region of the resist film.
According to the resist pattern formation method of this invention, an alignment accuracy determining mark not penetrating a resist film in section is formed in an alignment mark formation region of the resist film. Therefore, when an insulating film is etched by using a resist pattern formed from the resist film, no opening is formed in the insulating film in a position corresponding to the alignment accuracy determining mark. Accordingly, when an upper conductive film is deposited on the insulating film, the upper conductive film is not filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern, so that the alignment accuracy determining mark formed in the lower conductive film can be optically observed. In other words, even after depositing the upper conductive film on the insulating film, the alignment accuracy determining mark formed in the lower conductive film can be optically observed. As a result,the alignment accuracy determining mark formed in the lower conductive film can be used again in determining alignment shift of a resist pattern for patterning an insulating film deposited on the upper conductive film.
In the resist pattern formation method of this invention, the second alignment accuracy determining mark preferably has a plane shape smaller than a plane shape of the first alignment accuracy determining mark and is preferably formed in an internal area of the first alignment accuracy determining mark when seen from above.
In this manner, the relationship in position between the first alignment accuracy determining mark and the second alignment accuracy determining mark can be optically measured, and hence, the alignment shift of the second alignment accuracy determining mark from the first alignment accuracy determining mark can be definitely determined.
In the resist pattern formation method of this invention, the second alignment accuracy determining mark is preferably made from a concave portion formed in the resist film.
In this manner, when an insulating film is etched by using a resist pattern formed from the developed resist film, neither an opening is formed nor an upper conductive film is filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern. As a result, the alignment accuracy determining mark formed in the lower conductive film can be optically observed.
In the resist pattern formation method, the second alignment accuracy determining mark preferably includes a step portion formed in the resist film.
In this manner, when an insulating film is etched by using a resist pattern formed from the developed resist film, neither an opening is formed nor an upper conductive film is filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern. As a result, the alignment accuracy determining mark formed in the lower conductive film can be optically observed.
The method of determining alignment accuracy of this invention comprises the steps of forming a resist film on an insulating film formed on a conductive film pattern having a first alignment accuracy determining mark in an alignment mark formation region different from an element formation region; forming a main pattern in the element formation region of the resist film by irradiating the resist film with exposing light through a photomask and developing the resist film after irradiation, and forming a second alignment accuracy determining mark not penetrating, in section, the resist film in the alignment mark formation region of the resist film; and determining alignment shift of the second alignment accuracy determining mark from the first alignment accuracy determining mark by optically determining a relationship in position between the first alignment accuracy determining mark and the second alignment accuracy determining mark.
According to the method of determining alignment accuracy of this invention, an alignment accuracy determining mark not penetrating a resist film in section is formed in an alignment mark formation region of the resist film. Therefore, when an insulating film is etched by using a resist pattern formed from the resist film, no opening is formed in a position of the resist film corresponding to the alignment accuracy determining mark. Accordingly, when an upper conductive film is deposited on the insulating film, the upper conductive film is not filled in the insulating film in the position corresponding to the alignment accuracy determining mark of the resist pattern, so that the alignment accuracy determining mark formed in the lower conductive film can be optically observed. As a result, alignment shift of the second alignment accuracy determining mark from the first alignment accuracy determining mark can be definitely determined by optically measuring the relationship in position between the first alignment accuracy determining mark and the second alignment accuracy determining mark.
The method of fabricating a semiconductor device of this invention comprises the steps of forming, on a semiconductor substrate, a first conductive film pattern having a first alignment accuracy determining mark from a first conductive film; forming a first insulating film on the first conductive film pattern; forming a first resist film on the first insulating film; forming, from the first resist film, a first resist pattern having a second alignment accuracy determining mark not penetrating, in section, the first resist film in a position corresponding to the first alignment accuracy determining mark by irradiating the first resist film with exposing light through a first photomask and developing the first resist film after irradiation; optically determining alignment shift of the second alignment accuracy determining mark from the first alignment accuracy determining mark, and when the alignment shift is within an allowable range, forming a first insulating film pattern from the first insulating film by etching the first insulating film by using the first resist pattern as a mask; forming a second conductive film pattern from a second conductive film deposited on the first insulating film pattern; forming a second insulating film on the second conductive film pattern; forming a second resist film on the second insulating film; forming, from the second resist film, a second resist pattern having a third alignment accuracy determining mark not penetrating, in section, the second resist film in a position corresponding to the first alignment accuracy determining mark by irradiating the second resist film with exposing light through a second photomask and developing the second resist film after irradiation; optically determining alignment shift of the third alignment accuracy determining mark from the first alignment accuracy determining mark, and when the alignment shift is within an allowable range, forming a second insulating film pattern from the second insulating film by etching the second insulating film by using the second resist pattern as a mask; and forming a third conductive film pattern from a third conductive film deposited on the second insulating film pattern.
According to the method of fabricating a semiconductor device of this invention, the alignment shift of the first resist pattern is determined by optically measuring the alignment shift of the second alignment accuracy determining mark from the first alignment accuracy determining mark, and the alignment shift of the second resist pattern is determined by optically measuring the alignment shift of the third alignment accuracy determining mark from the first alignment accuracy determining mark. As a result, the second alignment accuracy determining mark and the third alignment accuracy determining mark can be formed in substantially the same position.
Accordingly, one and the same mask can be used as the first photomask and the second photomask. Also, when the first photomask and the second photomask are different from each other, the area occupied by the alignment accuracy determining mark region in each of the first and second photomasks can be reduced, so that the area occupied by the main pattern region of each photomask can be increased.
In the method of fabricating a semiconductor device, preferably, the first photomask has an opening for forming a contact hole, the second photomask has an opening for forming a line groove, a contact hole is formed in the first insulating film pattern, the second conductive film pattern includes a contact formed in the contact hole, a line groove communicated with the contact hole is formed in the second insulating film pattern, and the third conductive film includes a buried line formed in the line groove.
In this manner, the area occupied by the main pattern region in the photomask used for forming a multilayered line having a damascene structure can be increased.
Preferably in the method of fabricating a semiconductor device, preferably, the first photomask and the second photomask are the same mask having an opening for forming a contact hole, a lower portion of a contact hole is formed in the first insulating film pattern, the second conductive film pattern includes a contact lower portion formed in the lower portion of the contact hole, an upper portion of the contact hole communicating with the lower portion of the contact hole is formed in the second insulating film pattern, and the third conductive film pattern includes a contact upper portion formed in the upper portion of the contact hole.
In this manner, a contact hole having a depth beyond the limit aspect ratio can be formed by using the same photomask without causing alignment shift between the lower portion of the contact hole formed in the first insulating pattern and the upper portion of the contact hole formed in the second insulating pattern.